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STP60NH2LL
N-channel 24V - 0.010 - 40A TO-220 STripFETTM Power MOSFET
General features
Type STP60NH2LL VDSS (@Tjmax) 24V RDS(on) <0.011 ID 40A(1)
1. Value limited by wire bonding
RDS(ON) * Qg industry's benchmark Conduction losses reduced Switching losses reduced Low threshold device
TO-220
1
3 2
Description
The STP60NH2LL utilizes the latest advanced design rules of ST's proprietary STripFETTM technology. This is suitable for the most demanding DC-DC converter application where high efficiency is to be achieved.
Internal schematic diagram
Applications
Switching application
Order codes
Part number STP60NH2LL Marking P60NH2LL Package TO-220 Packaging Tube
January 2007
Rev 3
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Contents
STP60NH2LL
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................ 6
3 4 5 6
Test circuit
................................................ 8
Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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STP60NH2LL
Electrical ratings
1
Electrical ratings
Table 1.
Symbol Vspike(1) VDS VGS ID ID IDM
(2)
Absolute maximum ratings
Parameter Drain-source Voltage Rating Drain-source voltage (VGS = 0) Gate-source voltage Drain current (continuous) at TC = 25C Drain current (continuous) at TC=100C Drain current (pulsed) Total dissipation at TC = 25C Derating factor Value 30 24 18 40 28 160 60 0.4 600 -55 to 175 Max. operating junction temperature Unit V V V A A A W W/C mJ C
PTOT EAS(3) Tstg
Tj
Single pulse avalanche energy Storage temperature
1. Guaranteed when external Rg=4.7 and tf < tfmax 2. Pulse width limited by safe operating area 3. Starting Tj = 25 oC, ID = 20A, VDD = 15V
Table 2.
Rthj-case Rthj-a Tl
Thermal data
Thermal resistance junction-case Max Thermal resistance junction-ambient Max Maximum lead temperature for soldering purpose 2.5 100 275 C/W C/W C
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Electrical characteristics
STP60NH2LL
2
Electrical characteristics
(TCASE=25C unless otherwise specified) Table 3.
Symbol V(BR)DSS
On/off states
Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 25 mA, VGS= 0 VDS = Max rating, VDS = Max rating TC=125C VGS = 16V VDS= VGS, ID = 250A VGS= 10V, ID= 20A VGS= 4.5V, ID= 20A 1 0.010 0.011 0.012 0.0135 Min. 24 1 10
100
Typ.
Max.
Unit V A A nA V
IDSS
IGSS VGS(th) RDS(on)
Table 4.
Symbol gfs
(1)
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time rise time Turn-off delay time fall time Total gate charge Gate-source charge Gate-drain charge Output charge Gate input resistance Test conditions VDS = 10V, ID = 10A VDS =25V, f=1 MHz, VGS=0 Min. Typ. 18 990 385 40 5 56 13 10 8.7 4.2 2.4 7.6 1.3 27 Max. Unit S pF pF pF ns ns ns ns nC nC nC nC
Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Qoss(2) Rg
VDD = 10 V, ID = 20 A , RG = 4.7 VGS = 4.5 V (see Figure 13) 0.44 VDD=10V, ID = 40A VGS =4.5V VDS= 16 V, VGS= 0 V f=1MHz Gate DC Bias=0 test signal level=20mV open drain
1. Pulsed: pulse duration=300s, duty cycle 1.5% 2. Qoss = Coss* Vin , Coss = Cgd + Cds . See Chapter 4: Appendix A
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STP60NH2LL
Electrical characteristics
Table 5.
Symbol ISD ISDM VSD(1) trr Qrr IRRM
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD=20A, VGS=0 ISD=40A, di/dt = 100A/s, VDD=15V, Tj=150C (see Figure 15) 32.5 28 1.7 Test conditions Min. Typ. Max 40 160 1.3 Unit A A V ns C A
1. Pulsed: pulse duration=300s, duty cycle 1.5%
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Electrical characteristics
STP60NH2LL
2.1
Figure 1.
Electrical characteristics (curves)
Safe operating area Figure 2. Thermal impedance
Figure 3.
Output characteristics
Figure 4.
Transfer characteristics
Figure 5.
Transconductance
Figure 6.
Static drain-source on resistance
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STP60NH2LL Figure 7. Gate charge vs. gate-source voltage Figure 8.
Electrical characteristics Capacitance variations
Figure 9.
Normalized gate threshold voltage vs. temperature
Figure 10. Normalized on resistance vs. temperature
Figure 11. Source-drain diode forward characteristics
Figure 12. Normalized Breakdown Voltage vs. Temperature
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Test circuit
STP60NH2LL
3
Test circuit
Figure 14. Gate charge test circuit
Figure 13. Switching times test circuit for resistive load
Figure 15. Test circuit for inductive load Figure 16. Unclamped Inductive load test switching and diode recovery times circuit
Figure 17. Unclamped inductive waveform
Figure 18. Switching time waveform
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STP60NH2LL
Appendix A
4
Appendix A
Figure 19. Buck converter: power losses estimation
The power losses associated with the FETs in a synchronous buck converter can be estimated using the equations shown in the table below. The formulas give a good approximation, for the sake of performance comparison, of how different pairs of devices affect the converter efficiency. However a very important parameter, the working temperature, is not considered. The real device behavior is really dependent on how the heat generated inside the devices is removed to allow for a safer working junction temperature.

The low side (SW2) device requires: Very low RDS(on) to reduce conduction losses Small Qgls to reduce the gate charge losses Small Coss to reduce losses due to output capacitance Small Qrr to reduce losses on SW1 during its turn-on The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source voltage to avoid the cross conduction phenomenon; The high side (SW1) device requires: Small Rg and Ls to allow higher gate current peak and to limit the voltage feedback on the gate Small Qg to have a faster commutation and to reduce gate charge losses Low RDS(on) to reduce the conduction losses.
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Appendix A
STP60NH2LL
Table 6.
Power losses calculation
High side switching (SW1) Low side switch (SW2)
Pconduction
R DS(on)SW1 * I 2 * L
R DS(on)SW2 * I 2 * (1 - ) L
IL Ig
Pswitching
Vin * (Q gsth(SW1) + Q gd(SW1) ) * f *
Zero Voltage Switching
Recovery
(1)
Not applicable
Vin * Q rr(SW2) * f
Pdiode Conductio n Not applicable
Vf(SW2) * I L * t deadtime * f Q gls(SW2) * Vgg * f
Vin * Q oss(SW2) * f 2
Pgate(QG)
Q g(SW1) * Vgg * f
PQoss
Vin * Q oss(SW1) * f 2
1. Dissipated by SW1 during turn-on
Table 7.
Parameters meaning
Meaning Duty-cycle Post threshold gate charge Third quadrant gate charge On state losses On-off transition losses Conduction and reverse recovery diode losses Gate drive losses Output capacitance losses
Parameter d Qgsth Qgls Pconduction Pswitching Pdiode Pgate PQoss
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STP60NH2LL
Package mechanical data
5
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
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Package mechanical data
STP60NH2LL
TO-220 MECHANICAL DATA
DIM. A b b1 c D E e e1 F H1 J1 L L1 L20 L30 mm. MIN. 4.40 0.61 1.15 0.49 15.25 10 2.40 4.95 1.23 6.20 2.40 13 3.50 16.40 28.90 3.75 2.65 3.85 2.95 0.147 0.104 TYP MAX. 4.60 0.88 1.70 0.70 15.75 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 MIN. 0.173 0.024 0.045 0.019 0.60 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 0.645 1.137 0.151 0.116 inch TYP. MAX. 0.181 0.034 0.066 0.027 0.620 0.409 0.106 0.202 0.052 0.256 0.107 0.551 0.154
oP
Q
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STP60NH2LL
Revision history
6
Revision history
Table 8.
Date 31-May-2005 06-Sep-2006 31-Jan-2007
Revision history
Revision 1 2 3 First release. The document has been reformatted. Typo mistake on Table 1. Changes
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STP60NH2LL
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